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Programming the FPGA
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After the installation of Vivado, we will have to clone the fpga repository and edit an existing project for our Hello World project.

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Clone FPGA GitHub repository
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Go to the `Red Pitaya GitHub <https://github.com/RedPitaya/RedPitaya>`_ site, and download the ZIP folder of this project.
 
.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/clonerepo1.png
    :height: 200px
    :width: 500 px
    :align: left

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Make a FPGA project
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Go to the downloaded ZIP location and extract it. You will enter the fpga folder and make a Vivado project. Open a Terminal and input the following commands.

.. code-block:: bash

    cd Downloads/
    cd RedPitaya-master/
    cd fpga/
    . /opt/Xilinx/Vivado/2017.2/settings64.sh
    make project PRJ=v0.94

.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/comandoslinux.png
    :height: 400px
    :width: 500 px
    :align: left

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For this project you will only have to edit the **red_pitaya_top.sv** file. In the beggining of the file edit the port **led_o** assignment. Write the port as an **output logic**.

.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/outputled1.png
    :height: 400px
    :width: 500 px
    :align: left

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Now edit this part of the file and comment the **led_o** port.

.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/commentled.png
    :height: 400px
    :width: 500 px
    :align: left

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Finally insert this code at the end of the module that has a purpose of led blinking. Input that before **endmodule: red_pitaya_top**.

.. code-block:: Verilog

    reg [27:0]counter = 28'd0; 
    reg led = 1'b0;
    always @ (posedge adc_clk) begin
        counter = counter+1;
        if (counter == 28'd256000000) begin // 256e6 periods of clock of 128 MHz
            led = ~led; // led will blink with a period of 2 sec
            counter = 28'd0; // start again
    end 
    end
    assign led_o[0] = led; // assign the register to the led output


.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/codigoled.png
    :height: 400px
    :width: 500 px
    :align: left

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Now you have to start Synthesis, Implementation and Write bitstream. Press the button to start the synthesization.

.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/sith.png
    :height: 400px
    :width: 500 px
    :align: left

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After finished synthesis. Start Implementation.

.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/implementation.png
    :height: 400px
    :width: 500 px
    :align: left

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Finished Implementation. Start Write bitstream.

.. image:: https://raw.githubusercontent.com/victorhkr/Documentation_test/master/bitstream.png
    :height: 400px
    :width: 500 px
    :align: left

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Now you have the bitstream file **red_pitaya_top.bit** located in .../fpga/prj/v0.94/project/repitaya.runs/impl_1

You have to send this file to your red pitaya board. Open a terminal and connect to red pitaya using ssh connection. In redpitaya enable read-write operation.

.. code-block:: bash
    
    ssh root@your Red Pitaya IP
    redpitaya> rw

Open another Terminal and go to the .bit file location.

.. code-block:: bash
    
    cd Downloads/RedPitaya-master/fpga/prj/v0.94/project/repitaya.runs/impl_1
    
Send the file .bit to redpitaya with scp command.

.. code-block:: bash
    
    scp red_pitaya_top.bit root@your Red Pitaya IP:/tmp

Go back to redpitaya Terminal, check if you have the copy red_pitaya_top.bit

.. code-block:: bash

    redpitaya> cd /tmp
    redpitaya>ls

Load fpga.bin to xdevcfg with

.. code-block:: bash

    redpitaya> cat /tmp/fpga.bin >/dev/xdevcfg

Congratulations the led should be blinking and you implemented the project in the FPGA.